Job Information
Jabil Sr. Lead FPGA /CPLD Engineer in Sanchong, Taiwan
At Jabil we strive to make ANYTHING POSSIBLE and EVERYTHING BETTER. We are proud to be a trusted partner for the world's top brands, offering comprehensive engineering, manufacturing, and supply chain solutions. With over 50 years of experience across industries and a vast network of over 100 sites worldwide, Jabil combines global reach with local expertise to deliver both scalable and customized solutions. Our commitment extends beyond business success as we strive to build sustainable processes that minimize environmental impact and foster vibrant and diverse communities around the globe.
Build your career with Jabil! We challenge and empower you to make most of your talents, working with outstanding colleagues from diverse backgrounds who share your drive and passion to make Jabil grow!
JOB SUMMARY
Under the guidance of management, develops new engineering design of a basic to moderate complexity. Gathers design requirements and recommends steps to implement basic to moderate reference design. implementation or design modifications of existing product. Perform and analyze basic to moderate circuit design, referring more complex issues to management or more senior team members. Develop subsystem architecture at the direction of a Sr. Engineer or above.
ESSENTIAL DUTIES AND RESPONSIBILITIES
Work closely with Hardware, BIOS, BMC, and Firmware team for CPLD / FPGA design, validation, and maintenance
Develop Server / Storage production power on sequence control logic by CPLD / FPGA
Implement new technology and design concept in CPLD / FPGA
Design test plan, development specification, and issue tracking
JOB QUALIFICATIONS
KNOWLEDGE REQUIREMENTS
TECHNICAL KNOWLEDGE & SKILLS
15 years of working experience in CPLD / FPGA development
Familiar with CPLD / FPGA design and Verilog/VHDL coding
Experience in I2C, SPI, UART, and SGPIO protocols
Experience in RTL coding and simulation is a plus
Building in the area of CPLDs and FPGAs including coding practice, RTL coding standards, using Git, building test benches, etc.
Familiar with C language, PFR, and eclipse.
NON-TECHNICAL KNOWLEDGE & SKILLS
Influence others and share best practices.
Effectively communicate with good understanding of English.
Work as part of a global team.
EDUCATION & EXPERIENCE REQUIREMENTS
Electrical Engineering Degree (BSEE/MSEE or equivalent experience)
1+ years experience in CPLD / FPGA design or other key competency
Or an equivalent combination of education, training or experience.
Domestic and international travel is required (within 1 month)
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Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, sexual orientation, gender identity, age, disability, genetic information, veteran status, or any other characteristic protected by law.
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