Job Information
SLAC National Accelerator Laboratory ASIC Design Engineer in Menlo Park, California
ASIC Design Engineer
Job ID
5683
Location
SLAC - Menlo Park, CA
Full-Time
Regular
SLAC Job Postings
Position Overview:
SLAC National Accelerator Laboratory seeks an Application Specific Integrated Circuit (ASIC) design engineer within the Integrated Circuits Department of the Instrumentation Division of the Technology Innovation Directorate. The IC department develops state-of-the-art, low-noise and low-power front-end Application Specific Integrated Circuits (ASICs) to support experiments in several fields of science, such as: ultra-fast X-ray photon science, high energy physics, quantum information science, medical imaging, biomedicine, space applications, and others. Several projects are carried out in collaboration with major research facilities in the world (CERN, NASA, LCLS) and other US government agencies and universities. Moreover, the IC department develops innovative IP solutions in collaboration with industrial partners.
The department is seeking to strengthen its capabilities in analog/mixed signal design to implement the next generation system-on-chip (SoC) ASICs. As mixed signal designer you will be exposed to advanced CMOS technologies such as 65nm, 28nm, and 22nm FDSOI, designing novel circuit techniques for extreme conditions (cryogenic temperatures, high radiation levels, ultra-low power) and emerging applications.
Members of our team are encouraged to work in a variety of areas, supporting multiple diverse designs in a dynamic, energetic environment which values work life balance and comes with all of the benefits of being an employee of Stanford University.
The work will include science, engineering concept development and hands-on work with detectors systems. SLAC has broad engineering and technical support, but there will be a need for a wide range of work ranging from concept development to laboratory performance testing, to electronics and software development, to on-site commissioning. This position requires exceptional adaptability in doing whatever is needed to ensure the successful realization of projects. This work involves solving problems no one has ever solved before. There will be lots of opportunities for technical discussions, but ultimately the individual in this role will have responsibility for finding the solutions.
Given the nature of this position, SLAC is open to on-site and hybrid work options.
Your specific responsibilities include:
As an ASIC designer, you will be involved in the design and integration of advanced and complex ASICs through the following assignments:
Define key specifications of analog and digital circuitry.
Behavioral modeling to validate system architectures.
Design of ultra-low-noise, low-power analog front-end electronics.
Design of low-power and area efficient data converters with medium-high resolutions.
Circuit design techniques for signal conditioning, reliability, and testability.
On-chip supply regulation techniques through the design of low-noise and low-power LDOs
Design of high precision reference voltage and current circuits, including biasing techniques
Design optimization for cryogenic operation and radiation hardening.
Floor planning, layout design and physical verification of active circuits.
Top-level simulations to validate ASIC integration.
Document design towards formal design reviews.
Coordination of PCB design for chip characterization.
Hands-on in lab for chip characterization and testing plans for validation.
Cross-functional responsibilities
Engage and collaborate with SLAC cross-functional teams, including scientists and electronics engineers developing FPGAs, PCB, DAQ systems, semiconductor, and quantum sensor devices.
Engage and collaborate with other national labs, research institutions and high-tech companies.
To be successful in this position you will bring:
Master’s degree in the field of electronics engineering or related research fields.
Proficient with IC design flow and CAD toolsfor schematic entry, simulation, and layout design, including physical verification and top-level integration.
Solid knowledge of programming and/or scripting languages: Python, TCL, etc.
Solid knowledge of one or more HDL languages: Verilog, VHDL, SystemVerilog.
Working experience with verification techniques of mixed-signal circuits.
Strong knowledge on low-noise and low-power design techniques
Background in designing one or more of the following categories: low-noise and low-power amplifiers, biasing circuits, data converters, timing converters, PLLs and LDOs.
Deep knowledge of behavioral modeling of circuit blocks (Verilog-A, SystemVerilog RNM).
Demonstrated knowledge with version control for both analog and digital circuits.
Excellent writing skills to keep track of design documentation.
Strong team player and ability to adapt and work well in a research and development team
Ability to work with minimal supervision and carry out responsibilities proactively
Excellent analytical thinking skills
Strong communications skills
Preferred Qualifications:
Experience in designing circuits for harsh environments: high radiation, cryogenic temperatures.
Previous working experience in a research institution (University, US National Laboratories, CERN, NASA, etc. )
Experience designing and simulating in advanced CMOS technologies (below 65nm).
Knowledge of PCB design techniques for instrumentation.
Experience in the lab for chip characterization, debugging, data analysis and validation.
Hands-on experience with electronic instrumentation such as signal generators, spectrum analyzers, oscilloscopes, etc.
SLAC employee competencies:
Effective Decisions : Uses job knowledge and solid judgment to make quality decisions in a timely manner.
Self-Development : Pursues a variety of venues and opportunities to continue learning and developing.
Dependability : Can be counted on to deliver results with a sense of personal responsibility for expected outcomes.
Initiative : Pursues work and interactions proactively with optimism, positive energy, and motivation to move things forward.
Adaptability : Flexes as needed when change occurs, maintains an open outlook while adjusting and accommodating changes.
Communication : Ensures effective information flow to various audiences and creates and delivers clear, appropriate written, spoken, presented messages
Relationships : Builds relationships to foster trust, collaboration, and a positive climate to achieve.
Physical requirements and Working conditions:
- Consistent with its obligations under the law, the University will provide reasonable accommodation to any employee with a disability who requires accommodation to perform the essential functions of his or her job.
Work standards:
Interpersonal Skills: Demonstrates the ability to work well with Stanford colleagues and clients and with external organizations.
Promote Culture of Safety: Demonstrates commitment to personal responsibility and value for environment, safety and security; communicates related concerns; uses and promotes safe behaviors based on training and lessons learned. Meets the applicable roles and responsibilities as described in the ESH Manual, Chapter 1—General Policy and Responsibilities: http://www-group.slac.stanford.edu/esh/eshmanual/pdfs/ESHch01.pdf
Subject to and expected to comply with all applicable University policies and procedures, including but not limited to the personnel policies and other policies found in the University's Administrative Guide, http://adminguide.stanford.edu
Classification Title: Staff Engineer 2
Duration: Regular Continuing
Grade: K , Job code: 0132
The expected pay range for this position is $108,000 to $163,000 per annum. SLAC National Accelerator Laboratory/Stanford University provides pay ranges representing its good faith estimate of what the university reasonably expects to pay for a position. The pay offered to a selected candidate will be determined based on factors such as (but not limited to) the scope and responsibilities of the position, the qualifications of the selected candidate, departmental budget availability, internal equity, geographic location and external market pay for comparable jobs.
SLAC National Accelerator Laboratory is an Affirmative Action / Equal Opportunity Employer and supports diversity in the workplace. All employment decisions are made without regard to race, color, religion, sex, national origin, age, disability, veteran status, marital or family status, sexual orientation, gender identity, or genetic information. All staff at SLAC National Accelerator Laboratory must be able to demonstrate the legal right to work in the United States. SLAC is an E-Verify employer.