Job Information
Intel LTD Collateral Test Engineer in Hillsboro, Oregon
Job Description
Join Intel and build a better tomorrow!
Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So, join us and help us create the next generation of technologies that will shape the future for decades to come.
LTD Test develops electrical test programs for all X-chip and Shuttle ETest, Sort, Class and Burn-In modules. We support all LTD and ICF programs and customers.
LTD Product Development Engineers interface with Design, Device, Design Validation, Yield and Reliability groups throughout the development cycle to develop content to drive process development, improve design for test and reduce cost.
We have immediate positions available in Sort Cache (SRAM, Logic), Collateral (IO, PLL, ROS, etc.), Parametric (ETest) Testing and Scribeline Layout design areas.
This is an entry level position and compensation will be given accordingly.
The ideal candidate will demonstrate the following skills:
Strong communication skills
Analysis of complex process issues
Proven problem solving and solutions focused
Demonstrated work in a dynamic team environment and flexible to handle ambiguity and diverse tasks.
Qualifications
You must possess the minimum qualifications below to be initially be considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work, classes, research and or relevant previous job and or internship experiences.
Minimum Qualifications:
PhD degree with 6+ months experience OR a MS degree in Electrical Engineering, Physics, Computer Engineering, Computer Science or similar.
1+ years in semiconductor industry experience.
Preferred Qualifications:
2+ years experience in one or more of the following:
Digital logic or circuit analysis
Product test definition, pattern creation, test program integration, validation.
Test Platforms (Advantest T2000, or other).
Test program development platforms.
Experience identifying and driving test time reduction (TTR) projects.
IP knowledge and test development experience on HSIO, DDR, Thermal, Power, other analog circuits.
Familiarity with Design for Test (DFT) principles, test methods and HVM testing.
Expertise in System Verilog using OVM (open validation methodology) or UVM (universal validation methodology) methodology
Simulation and validation experience with hardware description languages such as Verilog and/or System Verilog
Hands-on experience on developing tests, environment and test bench setup for generating and validating ATE patterns/vectors using tools like VCF, TVPV or Flash
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.