Job Information
Microsoft Corporation Principal Design Verification Engineer in Austin, Texas
Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. The Artificial Intelligence Silicon Engineering (AISiE) System on Chip(SoC) Design Verification team is seeking a Principal Design Verification Engineer * * who can work with cross-discipline teams (including systems, firmware, architecture, design, validation, and product engineering) to develop environment and test cases to verify Microsoft’s latest AI accelerators.
Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.
Responsibilities
Creation of verification environments and tests, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation.
Other
Embody our Culture (https://www.microsoft.com/en-us/about/corporate-values) and Values (https://careers.microsoft.com/us/en/culture)
Qualifications
Required Qualifications:
9+ years of related technical engineering experience
OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
9+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon Intellectual Property(IP's) or systems.
5+ years’ industry experience of chip and/or computer architecture.
5+ years industry experience in Verilog or VHDL, C/C++, and scripting language such as Python, Ruby or Perl.
Other Requirements:
Ability to meet Microsoft, customer and/or government security screening requirements arerequired for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualifications :
Prior experience in two or more of the following will also be valuable:
Central Processing Unit(CPU) or graphics core verification.
In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, Universal Verification Methodology(UVM), and coverage.
Experience with hardware design for embedded systems.
Firmware development, with secure and non-secure boot flow.
Experience with hardware emulation or Field Programmable Gate Array(FPGAs).
Design experience or ability to write synthesizable code.
Software development experience.
Effective communication skills.
Energetic and self-motivated.
Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $137,600 - $267,000 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $180,400 - $294,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay
Microsoft will accept applications for the role until December 25, 2024.
Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (https://careers.microsoft.com/v2/global/en/accessibility.html) .